*“I know what you’re thinking, ’cause right now I’m thinking the same thing. Actually, I’ve been thinking it ever since I got here: Why oh why didn’t I take the BLUE pill?”*

But, we’re here, so let’s make the best of it. We will first go over the theory behind PWM signal generation, exactly how higher frequencies are created, and why this leads to both harmonic distortion of the signal, and of the PWM frequency. This will lead to analysis of the limitations of this form of DAC, and what can be done to minimize unwanted signals. Finally, graphs will be given which will help in making design decisions, considering noise floor and harmonic distortion trade-offs.

*1. PWM theory.*

At its most basic level, PWM is amplitude modulation (AM) of a carrier frequency (the PWM frequency). The pulse width of the carrier frequency effectively changes the amplitude of the output signal, and this is being modified at a rate much slower than the carrier frequency. With standard AM, you are multiplying 2 cosine waves, one with an offset, which gives the following result:

A*cos(*Fs*)*(1 + cos(*Fc*)) = A*cos(*Fs*) + A*(cos(*Fc* – *Fs*) + cos(*Fc* + *Fs*))

This says that when these 2 signals are modulated together, the output is the signal frequency (*Fs*), plus the sum and difference frequencies between the carrier (*Fc*) and the signal. This technique is sometimes used to shift the octave of a signal, as multiplying a signal with itself doubles its frequency. But, with PWM we see harmonics being produced at multiples of the modulation frequency, and at multiples of the carrier frequency (as shown below). So what’s going on here?

**Figure 1. Example PWM signal with 2.5kHz signal and 31.25kHz PWM frequency.**

The first thing to note, is that the PWM signal is actually a square wave, and is made up of multiple harmonics summed together. So instead of just AM on a single carrier, it is actually AM of the fundamental PWM frequency, and every harmonic of that frequency all the way up to infinity. Luckily, the amplitude of the harmonics drop off with distance from the fundamental, so their contributions are minimized. This explains why there are replicas of the modulated carrier at harmonics of the carrier, but there should still only be one set of signal harmonics on either side of these carriers (*Fc* +/- *Fs*). To explain this, we must first note that PWM is not a linear process. Below is a graph showing the relative amplitude of the first few harmonics of a PWM wave versus duty cycle.

**Figure 2. Amplitude of PWM harmonics versus duty cycle.**

We can see that the DC component varies linearly, which gives us our faithful replica of the sampled signal. But, the fundamental and its harmonics all vary as sinusoids, and at different rates. This means the amplitude does not vary linearly with the input signal, and there is a third term we must multiply by in order to get our output. This term distorts the signal, appearing as multiples of the modulation frequency, and can be seen to spread in either direction from the carrier harmonics.

The only unexplained part at this point is the harmonics of the sampled signal. As it turns out, there is a fourth modulation term, and that is the actual sample rate itself. The signal we are multiplying by is not a pure signal, it is actually sampled and held at the playback rate. This creates a stepped amplitude, sort of like a sine wave mixed with a triangle wave, which has harmonics at the carrier frequency and beyond. Although this is not the best mathematical representation of what is happening, it’s a close approximation which gives insight without having to go into convolution and sync functions.

**Figure 3. Approximation of signal components due to sampling artifacts.**

Multiplying this sampled signal with our carrier produces harmonics down at DC, since the sample rate is equal to the carrier frequency, and subtracting the two gives 0Hz. The harmonics also get modulated down to DC, which add in with our signal, and create distortions. As it turns out, the noise floor isn’t really noise at all. It’s the sum of all the reflected harmonics, of all the various modulation frequencies, bunching up around DC. The only additions which are noise (random) are from the power supply, and the finite resolution of the signal representation (8 bit noise floor, for example). This gives some unique opportunities to reduce the noise floor and the harmonics, if we can find a way to get the various harmonics to cancel rather than sum. The equation for the sum of the modulation harmonics is shown below.

**Figure 4. Equation for the sum of harmonics in a PWM signal.**

*2. Fast PWM versus Phase Correct PWM.*

We can now explain why Fast PWM produces higher harmonic distortion than Phase correct PWM. In the above modulation equation, the harmonics are given for a perfectly balanced waveform (Phase correct mode – cos(2*pi*i**Fc**t)). To get the square wave to have the high side on one side, and the low side on the other, a variable phase term would need to be added, so all the sines add up on one side, and not both sides (Fast mode – cos(2*pi*i**Fc**t + pi*i**f(t)*)). This creates a phase modulation term, which is dependent upon amplitude, causing even more distortion. To put it in more graphical terms, as the pulse width changes in Phase Correct mode, the “center of mass” of the pulse stays in the same place – the center. But, for Fast PWM, the rising edge of the pulse is always in the same place, and the falling edge moves further away as the pulse width increases. This moves the “center of mass” of the pulse as the pulse width changes, modulating the signal one more time, creating more harmonics.

**Figure 5. Changing pulse width for Phase Correct and Fast modes – “center of mass” of pulse width moves in Fast mode.**

So, if you can afford the loss of one extra bit (Phase Correct takes twice as long), then it is preferable to use Phase Correct mode. Figure 6 below shows the distortion trade-off between these two modes. But, what it doesn’t show, is the noise floor. Since the noise floor consists mostly of modulated signals, Fast mode has worse noise than Phase Correct mode for higher frequencies (they are about the same at lower frequencies).

*3. Minimizing distortion by increasing PWM frequency.*

This is the most straight forward method of reducing unwanted frequencies. As the carrier is moved away from the signal, the number of harmonics it takes to reach the signal increases. This reduces unwanted frequencies from carrier bleed. It also reduces signal distortion, as the signal is sliced into smaller time slices, each with a smaller relative difference from their neighbor. This attenuates the amplitude of the digital artifacts (the fourth modulator), and therefore the signal’s harmonic distortions.

Below are three graphs that show the trade-off of distortion versus frequency. They all contain data taken from a 2 x 8 bit PWM circuit running at 31.25kHz, with a sinewave being generated at varying frequencies. The first shows the harmonics of the signal frequency (harmonic distortion) for both Fast and Phase Correct modes. The second shows the harmonics of the carrier frequency (carrier bleed) for Fast mode, and the third shows the carrier harmonics for Phase Correct mode. The circles on the carrier bleed graphs represent the maximum frequency attainable without that harmonic going below 20kHz (becoming audible). The squares are the same, except extrapolated for a 62.5kHz PWM frequency. The circle and square markers on the frequency axes represent a 20kHz signal.

**Figure 6. Harmonic distortion of signal versus distance to carrier frequency.**

**Figure 7. Harmonics of PWM frequency versus distance between signal and carrier (Fast mode).**

**Figure 8. Harmonics of PWM frequency versus distance between signal and carrier (Phase Correct mode).**

There are a number of things to note in these graphs. First, there is a large difference in signal harmonics between Fast and Phase Correct modes. This is even more pronounced for the carrier harmonics. Only the first 5 harmonics are shown for Phase Correct mode, as the rest are below the noise floor. For Fast mode, 7 harmonics are shown, and they are all much larger in magnitude and do not drop off at low signal frequencies. This means that Fast mode has a much lower frequency cut-off before carrier bleed becomes audible. In either case, you do not want your signal to have a strong fundamental above approximately 2.5kHz. Luckily, most music tapers off its harmonic content above this frequency.

*4. Minimizing distortion by decreasing modulation depth.*

As can be seen from Figure 4, the amount of harmonic content is directly related to the depth of modulation (magnitude of *f(t)*). The same is true for the signal content itself, but the level at which each of these drops off is not equal. So, gains can be made by decreasing the depth of modulation. An example of these trade-offs is shown below for Phase Correct PWM (the FFT gain was 36dB if you want to convert the values to SNR). The maximum amplitude is a 2.5kHz, full swing, 16 bit value over 2, 8 bit PWMs.

**Figure 9. Distortion components versus signal amplitude for Phase Correct mode.**

Just to make things more complicated, the harmonic distortion not only depends upon the level of modulation, but *where* they are modulated. If you look at the modulation curve for the PWM frequency’s first harmonic in Figure 2, you will note that the slope is almost flat at 50% duty cycle (right at the top of the curve). For small modulations around this point, there will be negligible change in its amplitude, and harmonics will be minimized. On the other hand, if we were to operate at 0% or 100% duty cycle, the slope would be at its steepest, and the same amplitude of input signal would cause a much greater modulation depth.

Unfortunately, there are other harmonics to deal with as well, so it’s not as easy as just operating at the 50% mark. This happens to be the steepest point for the 2nd and 4th harmonics. And, just to make things even more confusing, the modulation becomes inverted for these harmonics near 100% duty cycle, so they begin to cancel rather than add. From tests, we have found that operating closer to 0% reduces the second harmonic, and reduces high frequency noise, whereas operation closer to 100% decreases the third harmonic at the expense of a more noise. In general, it is better to operate as close to 0% duty cycle as possible. If you are using a Dual PWM, be sure to lower both outputs by the same amount, and center them at the same average duty cycle, as this greatly reduces the noise floor. You will also need to adjust the resistor mixing ratio to match your effective bit ratio.

It is also interesting to note that the noise floor rises relatively slowly, if at all, for decreased amplitude. This is because it is made up of modulation harmonics, which also reduce with the amplitude modulation. This is more pronounced at the higher frequencies, whereas at the lower frequencies powersupply and bit depth noise dominates. For this reason, it’s often useful to sacrifice 16b for 14b, in order to reduce distortion, as you weren’t really going to get 16b anyways. And, along with lowering the signal’s distortion, amplitude reduction also lowers the PWM frequency’s distortion and associated carrier bleed.

Rather than go into all the effects amplitude and operating point have on carrier bleed, we will just give a few rules of thumb: 1. The higher harmonics matter the most, as these will be the ones which come into the audible band first. 2. Reducing amplitude attenuates higher harmonics more than lower harmonics (the 1st is actually increased, and the 2nd stays about the same). 3. Operating near 2/3 duty cycle reduces the 4th harmonic greatly. 4. Operating near 0% reduces the 3rd harmonic. 5. Operating near 50% reduces the 2nd harmonic. Ultimately, if carrier bleed is a problem, adjusting amplitude and operating point will only give minor improvements, and should be used as a last resort.

*5. Conclusions.*

For almost any audio setup, it will be worth the extra resistor to build a Dual 8 bit PWM running in Phase Correct mode. Only the most resource constrained circuit will demand Fast mode on a Single PWM. You will also run the PWM as fast as you can generate data, so the only parameters left to optimize around are the output amplitude and average duty cycle. Given this fact, it’s merely a matter of deciding if you can handle the reduced amplitude. If you were planning on putting in an active low-pass filter, gain could easily be integrated into that amplifier stage, minimizing the inconvenience.

For lower frequency applications, where the carrier is far away from the signal, it’s probably not worth going to reduced amplitude. But, for systems where you want to operate near the Nyquist frequency (1/2 the carrier frequency), it’s probably beneficial to sacrifice 2 bits of SNR, and go to 1/4 amplitude, 12.5% duty cycle, as it greatly reduces carrier bleed. Ultimately, harmonic distortion of the signal can get pretty high without being painful to listen to, but carrier bleed is instantly distracting.

Another possible option is to skip this PWM business altogether. You could use the same PWM generator, but sample the signal with an external circuit to create a waveform which is not modulated, and has no harmonic distortion. An example of this kind of circuit is shown below, basically an integrator and sample and hold function. Each individual PWM output is converted to an analog value, and then held until the next one is ready. It does involve a fair bit of extra circuitry, and digital control lines, so it’s hard to say what the benefits of this scheme are over just throwing a cheap DAC on your board. But, here it is for completeness’s sake:

**Figure 10. Non-modulating (low distortion) DAC built from PWM and control lines.**